EZ80 Opcode Table

Main Instructions
0123456789ABCDEF
0nop
Opcode:
00
Bytes:
1
Cycles:
1
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

No Operation

Nothing is ran during this instruction.

ld bc, Mmn
Opcode:
01 n m M
Bytes:
4
Cycles:
3
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Load

Loads the 24-bit value Mmn into register bc.

ld (bc), a
Opcode:
02
Bytes:
1
Cycles:
2
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Load

Loads the 8-bit value in register a into the memory position pointed to by register bc.

inc bc
Opcode:
03
Bytes:
1
Cycles:
1
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Increment

Increments register bc.

inc b
Opcode:
04
Bytes:
1
Cycles:
1
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
as defined
Half-Carry Flag:
as defined
Zero Flag:
as defined
Sign Flag:
as defined
Supported on TI?
yes

Increment

Increments register b.

dec b
Opcode:
05
Bytes:
1
Cycles:
1
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
as defined
Half-Carry Flag:
as defined
Zero Flag:
as defined
Sign Flag:
as defined
Supported on TI?
yes

Decrement

Decrement register b.

ld b, n
Opcode:
06 n
Bytes:
2
Cycles:
2
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Load

Loads the 8-bit value n into register b.

rlca
Opcode:
07
Bytes:
1
Cycles:
1
Carry Flag:
as defined
Add/Sub Flag:
reset
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
reset
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Rotate Left Carry Accumulator

Register a is rotated left by one bit; bit 7 is copied into the carry :flag and bit 0.

ex af, af'
Opcode:
08
Bytes:
1
Cycles:
1
Carry Flag:
as defined
Add/Sub Flag:
as defined
Parity/Overflow Flag:
as defined
Half-Carry Flag:
as defined
Zero Flag:
as defined
Sign Flag:
as defined
Supported on TI?
yes

Exchange

Register af is swapped with it's shadow counterpart af'.

add hl, bc
Opcode:
09
Bytes:
1
Cycles:
1
Carry Flag:
as defined
Add/Sub Flag:
reset
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
as defined
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Add

Calculates the sum of register hl and bc; the sum is put into register hl.

ld a, (bc)
Opcode:
0A
Bytes:
1
Cycles:
2
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Load

Loads the 8-bit value in the memory position pointed to by register bc into register a.

dec bc
Opcode:
0B
Bytes:
1
Cycles:
1
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Decrement

Decrements register bc.

inc c
Opcode:
0C
Bytes:
1
Cycles:
1
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
as defined
Half-Carry Flag:
as defined
Zero Flag:
as defined
Sign Flag:
as defined
Supported on TI?
yes

Increment

Increments register c.

dec c
Opcode:
0D
Bytes:
1
Cycles:
1
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
as defined
Half-Carry Flag:
as defined
Zero Flag:
as defined
Sign Flag:
as defined
Supported on TI?
yes

Decrement

Decrements register c.

ld c, n
Opcode:
0E n
Bytes:
2
Cycles:
2
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Load

Loads the 8-bit value n into register c.

rrca
Opcode:
0F
Bytes:
1
Cycles:
1
Carry Flag:
as defined
Add/Sub Flag:
reset
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
reset
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Rotate Right Carry Accumulator

Register a is rotated right by one bit; bit 7 is copied into the carry :flag and bit 0.

1djnz d
Opcode:
10 d
Bytes:
2
Cycles:
2/4
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Decrement Jump Not Zero

Register b is decremented. If register b wasn't set to zero, then the 8-bit signed displacement d is added to register pc. The displacement is measured from the next opcode.

ld de, Mmn
Opcode:
11 n m M
Bytes:
4
Cycles:
3
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Load

Loads the 24-bit value Mmn into register de.

ld (de), a
Opcode:
12
Bytes:
1
Cycles:
2
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Load

Loads the 8-bit value in register a into the memory position pointed to by register de.

inc de
Opcode:
13
Bytes:
1
Cycles:
1
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Increment

Increments register de.

inc d
Opcode:
14
Bytes:
1
Cycles:
1
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
as defined
Half-Carry Flag:
as defined
Zero Flag:
as defined
Sign Flag:
as defined
Supported on TI?
yes

Increment

Increments register d.

dec d
Opcode:
15
Bytes:
1
Cycles:
1
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
as defined
Half-Carry Flag:
as defined
Zero Flag:
as defined
Sign Flag:
as defined
Supported on TI?
yes

Decrement

Decrement register d.

ld d, n
Opcode:
16 n
Bytes:
2
Cycles:
2
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Load

Loads the 8-bit value n into register d.

rla
Opcode:
17
Bytes:
1
Cycles:
1
Carry Flag:
as defined
Add/Sub Flag:
reset
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
reset
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Rotate Left Accumulator

Rotates register a and the carry :flag left. Bit 7 is copied into the carry :flag; the carry :flag is copied into bit 0.

jr d
Opcode:
18 d
Bytes:
2
Cycles:
3
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Jump Relative

Adds the 8-bit signed displacement d to register pc. The displacement is measured from the next opcode.

add hl, de
Opcode:
19
Bytes:
1
Cycles:
1
Carry Flag:
as defined
Add/Sub Flag:
reset
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
as defined
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Add

Calculates the sum of register hl and de; the sum is put into register hl.

ld a, (de)
Opcode:
1A
Bytes:
1
Cycles:
2
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Load

Loads the 8-bit value in the memory position pointed to by register de into register a.

dec de
Opcode:
1B
Bytes:
1
Cycles:
1
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Decrement

Decrements register de.

inc e
Opcode:
1C
Bytes:
1
Cycles:
1
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
as defined
Half-Carry Flag:
as defined
Zero Flag:
as defined
Sign Flag:
as defined
Supported on TI?
yes

Increment

Increments register e.

dec e
Opcode:
1D
Bytes:
1
Cycles:
1
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
as defined
Half-Carry Flag:
as defined
Zero Flag:
as defined
Sign Flag:
as defined
Supported on TI?
yes

Decrement

Decrements register e.

ld e, n
Opcode:
1E n
Bytes:
2
Cycles:
2
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Load

Loads the 8-bit value n into register e.

rra
Opcode:
17
Bytes:
1
Cycles:
1
Carry Flag:
as defined
Add/Sub Flag:
reset
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
reset
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Rotate Right Accumulator

Rotates register a and the carry :flag right. Bit 0 is copied into the carry :flag; the carry :flag is copied into bit 7.

2jr nz, d
Opcode:
20
Bytes:
2
Cycles:
2/3
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Jump Relative

Adds the 8-bit signed displacement d to register pc if the zero :flag is set low. The displacement is measured from the next opcode.

ld hl, Mmn
Opcode:
21 n m M
Bytes:
4
Cycles:
3
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Load

Loads the 24-bit value Mmn into register hl.

ld (hl), a
Opcode:
22
Bytes:
1
Cycles:
2
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Load

Loads the 8-bit value in register a into the memory position pointed to by register hl.

inc hl
Opcode:
23
Bytes:
1
Cycles:
1
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Increment

Increments register hl.

inc h
Opcode:
24
Bytes:
1
Cycles:
1
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
as defined
Half-Carry Flag:
as defined
Zero Flag:
as defined
Sign Flag:
as defined
Supported on TI?
yes

Increment

Increments register h.

dec h
Opcode:
25
Bytes:
1
Cycles:
1
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
as defined
Half-Carry Flag:
as defined
Zero Flag:
as defined
Sign Flag:
as defined
Supported on TI?
yes

Decrement

Decrement register h.

ld h, n
Opcode:
26 n
Bytes:
2
Cycles:
2
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Load

Loads the 8-bit value n into register h.

daa
Opcode:
27
Bytes:
2
Cycles:
1
Carry Flag:
as defined
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
as defined
Half-Carry Flag:
as defined
Zero Flag:
as defined
Sign Flag:
as defined
Supported on TI?
yes

Decimal Adjust Accumulator

Adjusts register a after doing BCD arithmetic.

jr z, d
Opcode:
28
Bytes:
2
Cycles:
2/3
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Jump Relative

Adds the 8-bit signed displacement d to register pc if the zero :flag is set high. The displacement is measured from the next opcode.

add hl, hl
Opcode:
29
Bytes:
1
Cycles:
1
Carry Flag:
as defined
Add/Sub Flag:
reset
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
as defined
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Add

Calculates the sum of register hl and hl; the sum is put into register hl.

ld a, (hl)
Opcode:
2A
Bytes:
1
Cycles:
2
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Load

Loads the 8-bit value in the memory position pointed to by register hl into register a.

dec hl
Opcode:
2B
Bytes:
1
Cycles:
1
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Decrement

Decrements register hl.

inc l
Opcode:
2C
Bytes:
1
Cycles:
1
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
as defined
Half-Carry Flag:
as defined
Zero Flag:
as defined
Sign Flag:
as defined
Supported on TI?
yes

Increment

Increments register l.

dec l
Opcode:
2D
Bytes:
1
Cycles:
1
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
as defined
Half-Carry Flag:
as defined
Zero Flag:
as defined
Sign Flag:
as defined
Supported on TI?
yes

Decrement

Decrements register l.

ld l, n
Opcode:
2E n
Bytes:
2
Cycles:
2
Carry Flag:
unaffected
Add/Sub Flag:
unaffected
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
unaffected
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Load

Loads the 8-bit value n into register l.

cpl
Opcode:
2F
Bytes:
1
Cycles:
1
Carry Flag:
unaffected
Add/Sub Flag:
set
Parity/Overflow Flag:
unaffected
Half-Carry Flag:
set
Zero Flag:
unaffected
Sign Flag:
unaffected
Supported on TI?
yes

Complement Accumulator

Inverts all bits in register a (one's complement).

3
4
5
6
7
8
9
A
B
C
D
E
F
10
11